Verifiable ASICs

Home / Publications / Verifiable ASICs

Riad S. Wahby, Max Howald, Siddharth Garg, Abhi Shelat, and Michael Walfish

A manufacturer of custom hardware (ASICs) can undermine the intended execution of that hardware; high-assurance execution thus requires controlling the manufacturing chain. However, a trusted platform might be orders of magnitude worse in performance or price than an advanced, untrusted platform. This paper initiates exploration of an alternative: using verifiable computation (VC), an untrusted ASIC computes proofs of correct execution, which are verified by a trusted processor or ASIC.